The International Symposium on Quality Electronic Design (ISQED’23) recognized researchers in Lawrence Berkeley National Laboratory’s (Berkeley Lab’s) Computer Architecture Group – Patricia Gonzalez-Guerrero, George Michelogiannakis, Kylie Huch, Nirmalendu Patra, Thom Popovici – with a Best Paper Award for “An Area Efficient Superconducting Unary CNN Accelerator.”

ISQED is the premier electronic design conference that bridges the gap between electronic and semiconductor ecosystems. It brings together experts from academia, industry, and government to highlight quality electronic design tools, integrated circuit technologies, semiconductor technology, packaging, assembly, and testing to achieve total design quality. This year’s conference will be held April 5-7 in San Francisco.

In their award-winning paper, the Berkeley Lab team uses an alternative computing paradigm called Unary Single Quantum Flux (U-SFQ) tailored to the technological advantages of superconductors. In a proof of concept, they explore a superconducting hardware accelerator for convolutional neural networks (CNNs) that are faster and smaller than state-of-the-art.

“Superconducting circuits are a very promising technology for the post-Moore era of computing. I believe that alternative computing paradigms like the one we propose could be the key to enabling practical superconducting computing for solving scientific problems,” said Gonzalez-Guerrero, a Berkeley Lab postdoctoral researcher and lead author on the paper.

Over the past 30 years, advances in computer technology allowed processor performance and functionality to double every two years, a trend known as Moore’s Law. As computer chip manufacturing techniques reach the limits of the atomic scale, this era of predictable processor improvements is ending. In contrast, the computer processing demands of scientific applications continue to grow. So Berkeley Lab’s Computer Architecture Group is exploring alternatives to mainstream semiconductor technology, or complementary-metal-oxide-semiconductors (CMOS), to meet the increased processing demands.

One of the most promising post-Moore technologies is superconducting circuits, which are more energy efficient than CMOS semiconductors and can run at 50 to 70 GHz – significantly faster than contemporary CPUs with speeds ranging from 1.5 to about 5 GHz. But so far, superconducting prototypes have been limited to small-scale examples because of stringent area constraints (meaning that there isn’t enough space on the chip for computing components); and because researchers are applying CMOS-inspired voltage-level encoding techniques to these devices resulting in complex architectures that are at odds with the Single Quantum Flux (SFQ) pulses that superconductors use to carry information.